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Is there a DOS memory documentation available? (Users)

posted by bretjohn Homepage E-mail, Rio Rancho, NM, 09.01.2024, 17:35

> However, even if you run in a CS with 16-bit default address/operand size,
> the 386 allows you to change the sizes of a single instruction to 32-bits
> using the asize and osize prefixes. This works in 86 Mode and a 16-bit CS
> in Protected Mode. However, on a 386 in Protected Mode you can easily set
> segment limits beyond FFFFh so 32-bit memory references are possible from a
> 16-bit CS, at which point the term "16-bit Protected Mode" perhaps doesn't
> fully apply any longer.
Correct, and as you stated you probably really can't call it 16-bit PM any more, though I'm not sure exactly what you would call it. There are quite a few modern mode "variations" that don't exactly fit any of Intel's "standard" nomenclature (e.g., I personally think "Unreal Mode" is a really bad, or at least non-descriptive, term to use).

Why this matters in my specific case is that I'm updating my TSR's so that they will use less memory. I'm doing this by automatically leveraging the many types of memory access that are available and useful for TSR's: Upper Memory, EMS (with a Page Frame), and DPMS (sort of a "TSR Sidekick to DPMI" that was created by Novell a long time ago). When DPMS is installed, I use 16-bit PM, when it's not DPMS I use Real/V86 mode. I also don't use any op-codes or registers that won't work on an 8086/8088 CPU unless it's a section of code that doesn't run unless I know I'm using an advanced CPU.

With the setup I'm using, the same basic 16-bit code is used (and accesses 16-bit-sized data segments) no matter which environment the TSR got installed in (Lower, Upper, EMS, or DPMS). It will also work whether the EMS is real (via an add-on card on an 8086/8088 CPU) or whether it is emulated through XMS via something like EMM286 or EMM386. The TSR's will work on any CPU and I really don't need to change anything.

99% of the code is the same no matter what the environment is -- the only part that changes is when I'm manipulating segments/selectors. With this methodology, I am able to create a really complicated, intricate, full-featured TSR and still have it require only a few kiB of conventional or upper memory (if I'm using an advanced CPU) while most of the TSR is "hidden" in other places.

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