RayeR CZ, 05.12.2020, 00:26 |
Turbo C - ISR chaining? (Developers) |
Hi, is there some helper function/macro in Borland BC/TC for chaining ISR (DJGPP has such feature)? I'd like to hook and let my ISR code be called first, without modifying registers and when done call the old ISR with original registers. Problem is that BC automatically saves and restores all registers in ISR in its prolog/epilog code and when i do --- |
tkchia 05.12.2020, 07:09 @ RayeR |
Turbo C - ISR chaining? |
Hello RayeR, --- |
RayeR CZ, 06.12.2020, 18:25 @ tkchia |
Turbo C - ISR chaining? |
> Turbo C++ 3.0 and Borland C++ 3.1 apparently have a --- |
alexfru USA, 05.12.2020, 09:48 @ RayeR |
Turbo C - ISR chaining? |
> Hi, is there some helper function/macro in Borland BC/TC for chaining ISR |
RayeR CZ, 06.12.2020, 18:29 @ alexfru |
Turbo C - ISR chaining? |
> With this you should be able to examine and modify the return address on --- |
alexfru USA, 07.12.2020, 06:32 @ RayeR |
Turbo C - ISR chaining? |
> > With this you should be able to examine and modify the return address on |
tom Germany (West), 07.12.2020, 14:42 (edited by tom, 07.12.2020, 22:11) @ alexfru |
Turbo C - ISR chaining? |
> > > With this you should be able to examine and modify the return address |