Back to home page

DOS ain't dead

Forum index page

Log in | Register

Back to the forum
Board view  Mix view

DJGPP - how to make timeout in loop when interrupt disabled? (Developers)

posted by Japheth Homepage, Germany (South), 22.04.2008, 12:41

> The KBC port - what did you mean by "refresh cycle"? Is it DRAM refresh
> period? I think this can vary for different DRAM chips. There are some
> with extended refresh time, standard is about 15us? I don't need any
> precise timing here but it shouldn't lock longer than 1 second if there's
> no response from IDE port.

IIRC this bit is toggled when PIT timer 1 reaches zero. PIT timer 1 was used for DRAM refresh in the original IBM PC. What's important is that the timer ticks with a known frequency and its initial counter value isn't changed usually.

---
MS-DOS forever!

 

Complete thread:

Back to the forum
Board view  Mix view
22049 Postings in 2034 Threads, 396 registered users, 260 users online (0 registered, 260 guests)
DOS ain't dead | Admin contact
RSS Feed
powered by my little forum